ASIC & VLSI Design

ShanSys Engineering offers a range of services in ASIC & FPGA development, which include FPGA Based Development, Test Program Development for ATE, RTL Design Integration and Verification, Analog-Mixed Signal Design & Verification and RTL Design Integration and Verification.

Rapid evolution of Very Large Scale Integration (VLSI) is driven by the constant challenge of developing first-pass silicon in short time-to-market spans, while keeping development costs low.

With strong wide technologies in the VLSI Industry along with a rich experience of having worked with top chip manufacturers and design foundries across the Globe, we have the potential to develop high-end complex chip designs from concept to production-ready wafer/chip.

We comprehend changing customer needs and accordingly develop and deliver innovative future-enabled solutions. Our engineers have varying levels of hands-on experience in domain knowledge, latest technologies, design methodologies, modeling languages and verification techniques used in the industry.

Technology and Domain Expertise: Extensive SoC development experience of SoCs taped out, multi-domain experience in PCB, wireless systems and telecommunications, storage area networks, base station controllers, optical networks, HPC, SSD, automotive engine control, body electronics, strong IP, manufacturing bionetwork knowledge etc..,

Design and System Engineering: Processor based Platform and sub-system design, experience in high-speed interface – DDR4, PCIe, USB, 10G Serial PHY, PCB, latest verification technology using OVM, VMM, System Verilog, and experience in post-silicon validation.

Silicon Engineering: Experience in advanced technology nodes across all major foundries – 65nm, 40nm, 28nm, 14 nm, proven design methodology – Concise-DM methodology, High-performance ARM processor Etc.,

Experience with Automated Test Equipment: Silicon bring-up, Test program development & Optimization.

RTL Verification

Analog / digital / mixed signal verification, ASIC / FPGA / SoC verification, IP level verification, third party module verification across various design complexities / programming languages / methodologies and industrial verticals.

Emulation & FPGA prototyping

A comprehensive line of rapid FPGA based prototyping and emulating complex IC designs to develop first pass silicons. Extensive experience in Industry Standard Platforms such as Zebu, Palladium, HAPS, COTS FPGA and Custom FPGA prototyping platforms.

Physical Design

Execute ownership at block, cluster, section and SoC levels. Have implemented gate count designs, multi clock domains, efficient clock tree synthesis, pre and post timing analysis, timing closure in 16 different corners, maximum core frequency of 2.4 G, IP hardening with 90% placement utilization, low power IP implementation with coverage of more than 96%.

Turnkey Solutions

Provide end-to-end solution to reduce cycle time at improved quality level with our in-depth knowledge and vast experience in handling complex ASIC / FPGA / SoC process that varies significantly according to the Analog, Digital or Mixed signal design types.